Sixth MIT Conference on ADVANCED RESEARCH IN VLSI
April 2-4, 1990
Massachusetts Institute of Technology
Cambridge, Massachusetts
Organized by the Microsystems Research Center and sponsored in part by
National Science Foundation Contract Number MIP-8921671
INVITATION
INFORMATION
TENTATIVE AGENDA
The field of VLSI (Very Large Scale Integration) involves the design,
manufacture, and use of systems constructed from highly complex
integrated circuits. The field is an interrelated set of technical
disciplines including semiconductor devices and processes, circuit and
system design, design automation, and systems architecture.
Successful advanced research in any of these areas requires
understanding of the other areas. This conference, the twelfth in a
series that has been held at Caltech, MIT, UNC, and Stanford, seeks to
promote interaction among researchers in all disciplines that relate
to integrated systems.
The conference, which is similar to ones held at MIT in 1980, 1982,
1984, 1986, and 1988, will be relatively small and informal.
Attendance is by invitation only, and this announcement is being sent
to those who are invited. Others who wish to receive an invitation
should contact the VLSI Conference Coordinator, Room 39-321, MIT,
Cambridge, MA 02139; telephone (617) 253- 8138.
The conference is organized by the MIT Microsystems Research Center.
The conference chairman is Paul.Penfield, Jr. The conference program
committee consists of William J. Dally (MIT), Chairman: Bryan Ackland
(AT&T), Randal E. Bryant (CMU), George W. Cox (Intel), Henry Fuchs
(UNC), Norman P. Jouppi (DEC), Thomas F. Knight, Jr. (MIT), Charles E.
Leiserson (MIT), Teresa Meng (Stanford), Carlo Sequin (U. C.
Berkeley), Alberto L. Sangiovanni-Vincentelli (U. C. Berkeley), and
John Wawrzynek (U. C. Berkeley).
AGENDA
Monday, April 2, 1990
9:00 Introduction and Welcome: Paul Penfield, Jr., MIT
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SESSION I. Keynote
Chairman: William J. Dally, MIT
9:30 Invited Talk: "Auditory Processing using Analog VLSI," Carver
Mead, California Institute of Technology
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10:30 Coffee Break
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SESSION II Application Specific Design
Chairperson: Teresa Meng, Stanford University
11:00 "STONN: A Stochastic Neural Network Chip," William Wike and
David Van den Bout, North Carolina State University
11:30 "High Performance Signal Processing using the Residue Number
System," Oddvar Sorasen, Yngvar Lundh and Jon Kristian Hagene,
University of Olso
12:00 "Development of a Theme by Ziv and Lempel," Suzanne Bunton and
Gaetano Borriello, University of Washington
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12:30 Lunch - Student Center, Mezzanine Lounge
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SESSION III Accelerators
Chairman: George Cox, Intel
2:00 Invited Talk: "Synergism of Architecture and Algorithms: The MARS
System," Prathima Agrawal, AT&T Bell Laboratories
3:00 "ES–Kit: Rapid Prototyping of Scalable High Performance
Systems," Robert J. Smith, II, MCC
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3:30 Snack Break
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SESSION IV Timing and Verification
Chairman: Norman Jouppi, Digital Equipment Corp.
4:00 "Performance-oriented Technology Mapping," Herv Touati, Cho
Moon ,and Robert Brayton, University of California
4:30 "Synchronous Circuit Verification by Symbolic Simulation: An
Illustration," Derek L. Beatty, Randal E. Bryant, and Carl-Johan H.
Seger, Carnegie Mellon University
5:00 "A Timing Analysis of Level-Clocked Circuitry," Alexander T.
Ishii and Charles E. Leiserson, MIT
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5:30 Board buses for banquet
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Evening Banquet at New England Aquarium, Boston.
Banquet speaker, Charles Ferguson, MIT
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Tuesday, April 3, 1990
SESSION V Communication in Concurrent
Systems
Chairman: William J. Dally, MIT
8:00 Invited Talk: "Let’s Route Packets Instead of Wires," Charles L.
Seitz, California Institute of Technology
9:00 "Adaptive, Minimal Routing in Hypercubes," Smaragda
Konstantinidou, University of Washington
9:30 "Priority Arbitration with Buses," Shlomo Kipnis, MIT
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10:00 Snack Break
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SESSION VI Communication in Parallel Systems
Chairman: Charles E. Leiserson, MIT
10:30 Invited Talk: "The Role of Randomness in the Design of Parallel
Architectures," Tom Leighton, MIT
11:30 "Systems Design of the J-Machine," Michael Noakes and William J.
Dally, MIT
12:00 "The Fat-Pyramid: A Robust Network for Parallel Computation,"
Ronald I. Greenberg, University of Maryland
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12:30 Lunch – Student Center, Mezzanine Lounge
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SESSION VII Synthesis and/or Testability
Chairman: Randal E. Bryant, Carnegie Mellon University
2:00 Invited Talk: "New Trends in Logic Synthesis," Robert K. Brayton,
University of California, Berkeley
3:00 "Necessary and Sufficient Conditions for Delay-Fault Testability
of Combinational Logic Circuits," Srinivas Devadas, MIT, and Kurt
Keutzer, AT&T Bell Laboratories
3:30 "Extended Step-Fault Testability for Combinational Networks,"
Patrick C. McGeer, Robert K. Brayton, Richard L. Rudell, and Alberto
L. Sangiovanni-Vincentelli, University of California, Berkeley
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4:00 Snack Break
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SESSION VIII Timing Issues in Circuit Design
Chairman: Bryan Ackland, AT&T Bell Laboratories
4:30 "The Limitations to Delay-Insensitivity in Asynchronous
Circuits," Alain J. Martin, California Institute of Technology
5:00 "Differential High-Bandwidth Communication Circuits," Charles A.
Zukowski and Perng-Shyong Lin, Columbia University
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Wednesday, April 4, 1990
SESSION IX High Performance Packaging
Chairman: John Wawrzynek, University of California,
Berkeley
8:00 Invited Talk: "Packaging for Parallel Architectures," Barry
H.Whalen, MCC
9:00 "Physically Compact, High-Performance Multicomputers," W. C.
Athas, University of Texas
9:30 "Theoretical Aspects of VLSI: Pin Limitations," Robert Cypher,
IBM Almaden Research Center
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10:00 Coffee Break
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SESSION X Placement and Routing
Chairman: Alberto L. Sangiovanni-Vincentelli, University of
California, Berkeley
10:30 "Rapidly-Mixing Markov Chain Analysis of Simulated Annealing
Fractals," Gregory Sorkin, University of California, Berkeley
11:00 "On the Switchbox Routing in Diagonal Grid," Song Xiaoyu and
Fabrizio Luccio, University of Pisa
11:30 "Combined Floorplanning and Partitioning Heuristics for Mixed
Standard Cell and Macro Block Layout," Jitendra Apte and Gershon
Kedem, Duke University
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12:00 Lunch – Student Center, Mezzanine Lounge
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SESSION XI Sensors, Circuits and Architecture
Chairman: Thomas F. Knight, Jr., MIT
1:30 Invited Talk: "Merging of Microelectronics and Micromechanics,"
Kurt Peterson, NovaSensors
2:30 Invited Talk: "BiCMOS Circuit Design," Mark A. Horowitz,
Stanford University
PREREGISTRATION
REGISTRATION FEE 350.00
(Before March 12, $300.00)
MIT Microsystems Industrial Group $300.00*
(Before March 12, $250.00)
University and Government $225.00**
(Before March 12, $175.00)
Student $35.00**
*MIG Companies: Analog Devices, AT&T, DEC, GM,
IBM, NCR, Polaroid, Raytheon, and Draper Lab.
**NSF sponsorship allows us to waive part of the
registration fee for university and government
attendees.
The registration fee includes one copy of the conference proceedings,
the conference banquet on Monday night, lunches on Monday, Tuesday,
and Wednesday, and bus transportation to and from the hotel and the
banquet. Student registration does NOT include proceedings and
banquet, but student attendees may purchase a copy of the proceedings
at cost when they register.
Checks should be made payable to MIT-VLSI and returned, with the
attached Registration Form, by March 12, 1990, to:
VLSI Conference Registrations
Microsystems Research Center
Room 39-321
Massachusetts Institute of Technology
Cambridge, MA 02139
Telephone (617) 253-8138
CANCELLATIONS
Requests for refunds of registration will be honored through March 26
Participants canceling after that date will receive no refund but will
receive a copy of the proceedings.
GENERAL INFORMATION
LOCATION
The conference site will be Kresge Auditorium on the MIT campus.
REGISTRATION
Attendees may register at the Omni Parker House Hotel on Sunday
evening, April 1, from 5:00 to 8:00 p.m. on the second floor.
Registration will open on Monday at 7:30 a.m. in Kresge Auditorium.
Those participants who have not preregistered may not be able to
attend the conference banquet on Monday.
CONFERENCE HOTEL
The conference hotel is:
Omni Parker House
Tremont and School Streets
Boston, MA 02108
(617) 227-8600
1-800-THE-OMNI
Conference rates (not including tax) are:
Single or Double Standard $89.00
Single or Double Superior $109.00
A postage paid card is enclosed for making a reservation at the
conference hotel. Your reservation must be made by March 1, 1990.
CONFERENCE BANQUET
The conference banquet will be held Monday evening, April 2, at the
New England Aquarium on Boston’s waterfront. The speaker will be
Charles Ferguson, MIT.
TRANSPORTATION
Taxicabs are available between Logan Airport and the Omni Parker
House. Travel time is approximately 20 minutes. The hotel is located
one block from an MBTA subway station.
Bus transportation will be provided, at no extra cost to attendees,
for roundtrip transportation to the conference, the hotel, and the baN
FORM
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Name
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Affiliation
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Room No./Dept./MS
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Address
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(zip)
Telephone ———————————
(area code)
TOTAL AMOUNT ENCLOSED ——————-
Make check payable to MIT-VLSI and mail it, with this
form, to:
VLSI Conference Registrations
Microsystems Research Center
Room 39-321
Massachusetts Institute of Technology
Cambridge, MA 02139
Telephone (617) 253-8138
Please make sure that your name appears
somewhere on the check or stub for our reference.
Please note any special dietary needs.
———- vegetarian ———- kosher
—–_____ other (please specify)
Massachusetts Institute of Technology
Microsystems Research Center
Room 39-321
77 Massachusetts Avenue
Cambridge, MA 02139
–
— Rich
let…@wheaties.ai.mit.edu